JPS607228A - 半導体論理回路 - Google Patents

半導体論理回路

Info

Publication number
JPS607228A
JPS607228A JP58114562A JP11456283A JPS607228A JP S607228 A JPS607228 A JP S607228A JP 58114562 A JP58114562 A JP 58114562A JP 11456283 A JP11456283 A JP 11456283A JP S607228 A JPS607228 A JP S607228A
Authority
JP
Japan
Prior art keywords
mosfet
source
substrate
drain
logic circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58114562A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0430766B2 (en]
Inventor
Hideji Koike
秀治 小池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58114562A priority Critical patent/JPS607228A/ja
Publication of JPS607228A publication Critical patent/JPS607228A/ja
Publication of JPH0430766B2 publication Critical patent/JPH0430766B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/858Complementary IGFETs, e.g. CMOS comprising a P-type well but not an N-type well

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
JP58114562A 1983-06-25 1983-06-25 半導体論理回路 Granted JPS607228A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58114562A JPS607228A (ja) 1983-06-25 1983-06-25 半導体論理回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58114562A JPS607228A (ja) 1983-06-25 1983-06-25 半導体論理回路

Publications (2)

Publication Number Publication Date
JPS607228A true JPS607228A (ja) 1985-01-16
JPH0430766B2 JPH0430766B2 (en]) 1992-05-22

Family

ID=14640914

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58114562A Granted JPS607228A (ja) 1983-06-25 1983-06-25 半導体論理回路

Country Status (1)

Country Link
JP (1) JPS607228A (en])

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61185972A (ja) * 1985-02-13 1986-08-19 Nec Corp Misトランジスタの動作方法及びmisトランジスタの構造及びその製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS535585A (en) * 1976-07-05 1978-01-19 Nippon Gakki Seizo Kk Semiconductor ic unit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS535585A (en) * 1976-07-05 1978-01-19 Nippon Gakki Seizo Kk Semiconductor ic unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61185972A (ja) * 1985-02-13 1986-08-19 Nec Corp Misトランジスタの動作方法及びmisトランジスタの構造及びその製造方法

Also Published As

Publication number Publication date
JPH0430766B2 (en]) 1992-05-22

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